East Fishkill, NY, USA, 14. April, 2008 – IBM (NYSE: IBM) hat in Verbund mit den gemeinsamen Entwicklungspartnern Chartered Semiconductor Manufacturing Ltd. (Chartered), Freescale Inc., Infineon Technologies AG, Samsung Electronics Co., Ltd. (Samsung), STMicroelectronics N.V. und Toshiba Corporation heute bekannt gegeben, daß diese Chip-Allianz gemeinsam signifikante Leistungssteigerungs- und Energieensparergebnisse gegenüber bisherigen Chipindustrie-Standards erreicht hat. Dies geschieht durch den Einsatz eines Materials, das sich "High-k/Metal Gate" (HKMG) nennt. Eingesetzt wird es in der IBM 300-Millimeter-Halbleiter-Wafer-Fabrik in East Fishkill im Staat New York, USA. Mit dem jetzt erzielten Durchbruch wird die Technologie für erste Kundenprojekte einsatzbereit. Kunden können jetzt diese Niedrigenergie-Foundry-Technologie einsetzen für die Entwicklung eigener Elektronikprodukte mit einem besonders gutem Verhältnis aus erreichbarer Leistung und niedrigem Energieberbrauch.
Bei den HKMG-Testschaltkreisen und -Testchips konnten folgende,signifikante Leistungs- und Energieverbrauchsverbesserungen beobachtet werden: Die Chip-Allianz schätzt die Leistungsverbesserungen in der 32-Nanometer-Technologie auf bis zu 35 Prozent gegenüber 45-Nanometer-Schaltkreisen, die bei gleicher Betriebsspannung arbeiten. Der Stromverbrauch kann dabei um bis zu 30 bis 50 Prozent reduziert werden, je nach Betriebsspannung. Die Tests wesentlicher Elemente bei den Probechips gegenüber Standardmikroprozessoren haben dabei auch Leistungsverbesserungen um bis zu 40 Prozent im Vergleich zu konventioneller (Poly/SiON)-Technologie bei gleichen Grössendimensionen ergeben.*
Die Common-Platform-Allianzpartner - IBM, Chartered und Samsung - sind die ersten Unternehmen in der OEM-Foundry-Branche, die HKMG-Technologie in der 32-Nanometer-Technologiegeneration einzusetzen planen. Ein 32-Nanometer-Design-Enablement-Paket auf Niedrigenergiebasis wird jetzt verfügbar, mit vollkompatiblen Basisregeln für die Übertragbarkeit in die zukünftige 28-Nanometer-Technologie. Machbarkeitsstudien zu HKMG-Geräten zeigen, daß der Prozess möglicherweise bis zu einer 22-Nanometer-Generation weitergeführt werden kann. Damit wird erkennbar, daß Leistungsverbesserungen aus der HKMG-Technologie auch in künftigen Technologiegenerationen einfließen kann.
Bereits am 29. Januar 2007 haben IBM und Chip-Allianz-Forschungspartner, inklusive Sony und Toshiba, die High-k/Metal-Gate-Innovation als eine mögliche Basis für eine langgesuchte Verbesserung des Transistors bekanntgegeben. Der Transistor ist der winzige An-/Aus-Schalter, der als Basisbaustein für praktisch alle Mikrochips heute fungiert. Der Einsatz von High-k/Metal-Gate-Material in einem wichtigen Bestandteil des Transistors, der die primäre An/Aus-Schaltfunktion steuert, hat die Entwicklung der 32-Nanometer-Chipschaltkreise in kleinerer Dimension und in energieeffizienterer Weise ermöglicht als bisher möglich.
Weitere Informationen sowie Fussnotenerläuterung in der original US-Presseinformation anbei.
IBM-LED CHIP ALLIANCE DELIVERS MAJOR SEMICONDUCTOR PERFORMANCE LEAP,
POWER SAVINGS USING INNOVATIVE "HIGH-K/METAL GATE" MATERIAL
Innovative 32nm “High-K Metal Gate” Material Delivers up to 35 Percent Performance Boost, Consumes up to 45 Percent Less Power;
Low-Power Foundry Technology Now Ready for Early Customer Use
East Fishkill, NY – April 14, 2008 – IBM (NYSE: IBM) and its joint development partners – Chartered Semiconductor Manufacturing Ltd. (Chartered), Freescale Inc. , Infineon Technologies AG, Samsung Electronics Co., Ltd. (Samsung), STMicroelectronics N.V. and Toshiba Corporation – today announced that they have collectively demonstrated significant performance and power consumption advantages over industry standards by using a breakthrough material known as "high-k/metal gate” (HKMG) on silicon manufactured at IBM's state-of-art 300 millimeter (mm) semiconductor fabrication facility in East Fishkill, N.Y. With this achievement the joint development partners are now ready for early customer engagements. Clients may now design in this leading edge, low power foundry technology in order to help speed time-to-market and help realize power-performance advantage for their products.
Significant performance and power improvements have been observed in HKMG evaluation circuits and test chips on silicon manufactured at IBM's East Fishkill, N.Y. semiconductor fabrication facility. The alliance has assessed performance improvements on 32nm technology circuits of up to 35 percent over 45nm technology circuits at the same operating voltage. The 32nm power reduction over 45nm can be as much as 30 to 50 percent depending on the operating voltage. In addition, testing on product library test chip and industry standard microprocessor critical paths has shown performance improvements of up to 40 percent over conventional (Poly/SiON) technology at the same technology dimensions *.
“These early high-k/metal gate results demonstrate that by working together we can deliver leading-edge technologies that handily surpass others in the industry,” said Gary Patton, vice president for IBM's Semiconductor Research and Development Center on behalf of the technology alliance. "Demonstrating this caliber of result in a practical environment means that as our collective client base moves to next-generation technology by using the 'gate-first' approach, they will continue to maintain a significant competitive advantage.”
The Common Platform alliance partners – IBM, Chartered and Samsung – are the first in the original equipment manufacturing (OEM) foundry industry to unveil a HKMG technology in the 32nm technology generation. A low-power 32nm technology design enablement package with fully compatible ground rules for extendibility to the 28nm technology generation is now available. Silicon support for low-power 32nm HKMG technology will be available through a prototyping shuttle program starting in the third quarter of 2008, with plans for quarterly shuttles. Feasibility results from HKMG devices built at the College of Nanoscale Science and Engineering’s Albany NanoTech Complex indicate this process can be extended to 22nm, demonstrating that improvements resulting from the use of HKMG can continue to be delivered in successive technology generations.
“The semiconductor marketplace remains one of the most competitive in the world. Early market introduction combined with strong product differentiation is critical to success,” said Dirk Wrister, director of Process Technology at Freescale. "This early design and modeling work indicates that the high k/metal gate technology is going to deliver a significant product and performance differentiation. These early results are a significant step in the demonstration of high k/metal gate viability in 32nm technology."
On January 29, 2007, IBM and its research partners (including Sony and Toshiba) introduced the high-k/metal gate innovation as the basis for a long-sought improvement to the transistor – the tiny on/off switch that serves as the basic building block of virtually all microchips made today. Using the high-k/metal gate material in a critical portion of the transistor that controls its primary on/off switching function enabled the development of 32nm chip circuitry that is designed to be smaller, faster, and more power-efficient than previously thought possible.
* all statistics documented in testing by alliance partner tests performed in IBM’s East Fishkill N.Y. semiconductor fabrication facility, as well as their home facilities.
Kontakte:
Tiffany Sparks
Chartered Semiconductor Manufacturing
tiffanys@charteredsemi.com
Andy North
Freescale Semiconductor
Andy.north@freeswcale.com
Catherine Helzerman
IBM Media Relations
cahelzer@us.ibm.com
Agnes Toan
Infineon Technologies
agnes.toan@infineon.com
Lisa Warren-Plungy
Samsung Semiconductor
lwarrenplungy@ssi.samsung.com
Michael Markowitz
STMicroelectronics
Director of Technical Media Relations
Tel: +1 212 821 8959
michael.markowitz@st.com
Hiroko Mochida
Toshiba Corporation
Corporate Communications Office
International Media Relations Group
http://www.toshiba.co.jp/contact/media.htm
Photo: Please download image here.
Description: An alliance of high-technology companies led by IBM, and based in East Fishkill, NY, has once again broken barriers to the next generation of chip technology. Last December, the companies announced an easy way for device and computer manufacturers to take advantage of powerful next generation microchips. On April 14, 2008, the IBM-led alliance announced that it is ready for early customers and that test chips using this process are showing up to 35% better performance and use 45% less power -two critical factors for chips going into everything from next sensors in tomorrow's smart cars, to top of the line consumer electronics and supercomputers.
In the photo from right to left: Craig Lage, Project Leader: Freescale, An Steegen, Project Manager, 32nm Bulk Technology, IBM (Sitting left), John Pellerin, Project Leader: AMD, Ja-Hum Ku, Project Leader: Samsung, John Sudijono, Project Leader: Chartered (Sitting in middle), Mukesh Khare, Project Manager: High-K/Metal Gate Technology, IBM, Richard Lindsay, Project Leader: Infineon, Effendi Leobandung, Project Manager: 32nm SOI Technology, IBM (Sitting right).